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2025年2月16日至20日,国际固态电路会议(ISSCC)在美国旧金山举行。北京大学深圳研究生院信息工程学院广东省存算一体芯片重点实验室在此次会议上发表了题为"A 28nm 109.8TOPS/W 3D PNN Accelerator Featuring Adaptive Partition, Multi-Skipping, and Block-Wise Aggregation"的研究论文,这是北京大学深圳研究生院首次在ISSCC. 2月16日-20日,第72届国际固态电路会议(IEEE International Solid-State Circuits Conference, ISSCC)在美国旧金山召开,集成电路科学与工程学院模拟与混合信号电路研究组在该会议上发表2篇学术论文。研究内容涉及模数转换器(ADC)和时钟参考源芯片。 论文一:A Fully Dynamic Noise-Shaping SAR ADC Achieving 120dB SNDR and.
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